EDN

Streamlining the SoC Design Flow

In SoC design, a streamlined verification and analysis flow can contribute significantly to the success of a product. With manufacturing yield and time-to-market schedules crucial, it is important to ...
EDN

Reshaping the SoC power design flow

Power integrity has become one the most critical issues as chip designs have transitioned to 130nm and 90nm processing technologies. Decreasing supply voltages, increasing device density and leakage ...
SDxCentral

Synopsys 5G SoC enhances 5G development with new RF design flow for TSMC N6RF process

RFICs (Radio Frequency Integrated Circuits) for wireless data transmission systems, such as transceivers and RF front-end components, are becoming more complex based on the demands of our connected ...
Semiconductor Engineering

Earlier SoC Design Exploration And Verification Gets Better Designs To Tapeout Faster

Between the complexity of advanced node design verification and the competition to be first to the market, system-on-chip (SoC) designers no longer have the luxury of waiting until each sub-block of a ...
CIOL

Fujitsu and Synopsys deliver optimized and predictable customized SoC (ASIC) design flow

MOUNTAIN VIEW, USA: Synopsys Inc. announced, through joint collaboration with Fujitsu Semiconductor Ltd, a faster, area-optimized and highly predictable Customized SoC (ASIC) design flow for mutual ...
Design News

EDA Analytics Tool Boosts SoC Design Productivity

Circuit design involves evaluating a number of design scenarios using available data. To deal with the data explosion associated with increasing design complexity, EDA company Synopsys, Inc. has ...
Nasdaq

Synopsys and TSMC Advance Analog Design Migration with Reference Flow Across Advanced TSMC Processes

AI-driven design solution enables circuit optimization, saving weeks of manual and iterative effort while increasing design quality. Interoperable process design kits for all advanced TSMC FinFET ...
Electronic Design

SystemC Advances Set the Stage For New SoC Design Flow Strategy

A new specification for Open Core Protocol (OCP) users will present a seamless flow for complex system-on-a-chip (SoC) designs. Publication of the spec comes via the OCP International Partnership (OCP ...
Fox 5 San Diego

Baum’s Power Analysis Suite is Adopted for ASICLAND SoC Design Flow

PowerBaum is now offered through ASICLAND's solution SoC model, in which ASICLAND is involved in customers' product development process early on. Power analysis from the early design stage is very ...
Business Wire

Ausdia Solves Critical Design Flow Gap with OneSource Constraint Translation at DAC 2025

SAN FRANCISCO--(BUSINESS WIRE)--Ausdia, the leading provider of design constraints verification and management solutions, today introduced Timevision TM OneSource, at DAC 2025, the Chips to Systems ...
Seeking Alpha

Synopsys Boosts 5G SoC Development Productivity with New RF Design Flow for TSMC N6RF Process

With High-Quality, Tightly Integrated RFIC Design Products from Synopsys (SNPS), Ansys and Keysight, Flow Facilitates Power and Performance Optimizations for N6 Wireless Systems "Our latest ...