Nasdaq

Synopsys VCS Used by Graphcore to Verify Next-Generation Colossus GC200 IPU

MOUNTAIN VIEW, Calif., July 20, 2020 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced that Graphcore used the Synopsys VCS® simulation solution with Verdi® debug to verify its recently ...
Nasdaq

AImotive Deploys Synopsys VCS to Verify Next-Generation Automated Driving Technologies

MOUNTAIN VIEW, Calif., Dec. 9, 2020 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced that AImotive has adopted Synopsys VCS® simulation and Verdi® debug, part of the Verification ...
EDN

Synopsys adds testbench features to VCS

SANTA CRUZ, Calif. — Evolving its VCS Verilog simulator into a more complete verification environment, Synopsys this week (May 25) is announcing a new VCS release with added testbench capabilities. It ...
Design-Reuse

Synopsys Advances VCS Solution by Adding Assertion IP Library and Native Testbench Support for SystemVerilog

Latest version of the VCS® solution speeds standards-based verification by unifying SystemVerilog and SystemCâ„¢ languages in a single tool MOUNTAIN VIEW, Calif., May 31, 2005-- Synopsys, Inc. (Nasdaq ...
Design-Reuse

Faraday Verifies Complex CPU Cores with Synopsys' VCS and Vera Verification Solutions

Advanced Coverage and Testbench Technologies in the Synopsys Discoveryâ„¢ Verification Platform Enable Robust Validation of Faraday's Processor IP MOUNTAIN VIEW, Calif. and HSINCHU, Taiwan, May 10, ...
EDN

Synopsys Delivers 2x Verification Speed-up With VCS Multicore Technology

MOUNTAIN VIEW, Calif., April 6 /PRNewswire-FirstCall/ — Synopsys, Inc. , a world leader in software and IP for semiconductor design and manufacturing, today ...
Electronic Design

Intellitech brings IEEE 1149.1-2013 IP block verification to Synopsys VCS

Dover, NH. Intellitech Corp. has announced interoperability between its NEBULA silicon debugger, the Intellitech iJTAGServer bridge, and the Synopsys VCS functional-verification environment. The ...
Electronic Design

Testbench Automation Tool Provides Tight Links To Verilog Simulation

Faster runtime performance, real-time access to built-in Verilog simulation coverage metrics, and a unified graphical environment for waveform analysis are all ...
Business Wire

ProDesign Joins Synopsys in-Sync Program to Enable Unified ASIC Prototyping and Verification; Common ASIC Flow Optimized for Customer Productivity

SAN JOSE, Calif.--(BUSINESS WIRE)--April 4, 2005--ProDesign USA, a leading supplier of high-speed FPGA-based ASIC verification platforms, today announced that it has joined the Synopsys in-Sync(R) ...
Dataquest

Synopsys supports new Arm AGI CPU with full-stack design solutions

Synopsys Inc. announced its collaboration with Arm on the development of the Arm AGI CPU, providing solutions across its full-stack design portfolio including EDA, interface IP, and hardware-assisted ...
Semiconductor Engineering

New Technology Accelerates Multi-Die System Simulation

AI-powered chatbots. Robotic manufacturing equipment. Self-driving cars. Bandwidth-intensive applications like these are flourishing—and driving the move from monolithic system-on-chips (SoCs) to ...